RISC-V soft core 14: Measuring the board

Tue, 27 Oct 2026 14:00:00 +1100

Measuring the board

Part 14 of the RISC-V soft core series. Previously: The board arrives.

Part 13 ended with a list of things only the board can tell me. This part is the list I could get to: a scope on three signals, and a lot of bytes down the serial port. This might be the first part with no surprises, or a bunch of that’s what I thought bits.

I’ll say up front what is not here. I haven’t shown that the core meets 25 MHz on every path, and I haven’t looked at button bounce or the 7-segment flicker. Those are still to do, and maybe I will. This isn’t going to production, and with the signals I scoped and the serial soaks behind me I am fairly confident that what is supposed to happen is happening. As we know though … there are always edges.

RISC-V soft core 4: Talking to the world

Mon, 19 Oct 2026 00:05:00 +1100

Talking to the world: loads, stores and a boot menu

Part 4 of the RISC-V soft core series. Previously: Harvard by accident, von Neumann by choice.

So far the core can add, branch, load, store and light some LEDs. It cannot tell me anything. For that it needs a way to talk, and RISC-V gives you a surprisingly short answer about how: it has no input and output instructions at all. There is no IN and no OUT, as on an x86. The way you reach a device is the way you reach memory, with a load or a store to a particular address.

Uart on Ampsand

RISC-V soft core 14: Measuring the board

RISC-V soft core 4: Talking to the world