https://dean.sellers.id.au/tags/memory-mapped-io/ Recent content in Memory-Mapped-Io on Ampsand Hugo en-AU Dean Sellers Thu, 29 Oct 2026 12:04:08 +1100 https://dean.sellers.id.au/2026/10/19/riscv-04-talking-to-the-world/ Mon, 19 Oct 2026 00:05:00 +1100 https://dean.sellers.id.au/2026/10/19/riscv-04-talking-to-the-world/ <p class="post-subtitle">Talking to the world: loads, stores and a boot menu</p><p><em>Part 4 of the RISC-V soft core series. Previously: <a href="https://dean.sellers.id.au/2026/10/18/riscv-03-von-neumann-by-choice/">Harvard by accident, von Neumann by choice</a>.</em></p> <p>So far the core can add, branch, load, store and light some LEDs. It cannot tell me anything. For that it needs a way to talk, and RISC-V gives you a surprisingly short answer about how: it has <strong>no input and output instructions at all</strong>. There is no <code>IN</code> and no <code>OUT</code>, as on an x86. The way you reach a device is the way you reach memory, with a load or a store to a particular address.</p>