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		<title>C on Ampsand</title>
		<link>https://dean.sellers.id.au/tags/c/</link>
		<description>Recent content in C on Ampsand</description>
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			<copyright>Dean Sellers</copyright>
		
		
			<lastBuildDate>Thu, 29 Oct 2026 12:04:08 +1100</lastBuildDate>
		
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				<title>RISC-V soft core 10: What does a multiply cost?</title>
				<link>https://dean.sellers.id.au/2026/10/19/riscv-10-what-does-a-multiply-cost/</link>
				<pubDate>Mon, 19 Oct 2026 00:40:00 +1100</pubDate>
				<guid>https://dean.sellers.id.au/2026/10/19/riscv-10-what-does-a-multiply-cost/</guid>
				<description>&lt;p class=&#34;post-subtitle&#34;&gt;What does a multiply cost?&lt;/p&gt;&lt;p&gt;&lt;em&gt;Part 10 of the RISC-V soft core series. Previously: &lt;a href=&#34;https://dean.sellers.id.au/2026/10/19/riscv-09-first-c/&#34;&gt;First C on the core&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;&#xA;&lt;p&gt;The first C program had a line in it that looks harmless: &lt;code&gt;a * b&lt;/code&gt;. On a modern laptop that is one instruction and a few clock cycles. On this core there is no instruction for it. The core is RV32E with &lt;strong&gt;no M extension&lt;/strong&gt;, so no &lt;code&gt;mul&lt;/code&gt;, no &lt;code&gt;div&lt;/code&gt; and no &lt;code&gt;rem&lt;/code&gt;. The compiler turns each &lt;code&gt;*&lt;/code&gt;, &lt;code&gt;/&lt;/code&gt; and &lt;code&gt;%&lt;/code&gt; into a call to a library routine, a loop of shifts and adds that runs as ordinary code.&lt;/p&gt;</description>
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				<title>RISC-V soft core 9: First C on the core</title>
				<link>https://dean.sellers.id.au/2026/10/19/riscv-09-first-c/</link>
				<pubDate>Mon, 19 Oct 2026 00:35:00 +1100</pubDate>
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				<description>&lt;p class=&#34;post-subtitle&#34;&gt;First C on the core&lt;/p&gt;&lt;p&gt;&lt;em&gt;Part 9 of the RISC-V soft core series. Previously: &lt;a href=&#34;https://dean.sellers.id.au/2026/10/19/riscv-08-sleeping/&#34;&gt;Sleeping, and measuring it&lt;/a&gt;.&lt;/em&gt;&lt;/p&gt;&#xA;&lt;p&gt;Back in &lt;a href=&#34;https://dean.sellers.id.au/2026/10/18/riscv-00-why-not-mano/&#34;&gt;part 0&lt;/a&gt; I said the reason for choosing RISC-V over a machine of my own design was that the compiler already exists. It was a promise I had not yet kept. Everything the core had run so far was assembly I wrote or generated for the tests.&lt;/p&gt;&#xA;&lt;p&gt;This post is the first time a compiler&amp;rsquo;s output ran on it. It is also where the thing I built stops being a toy and starts being something you could write programs for.&lt;/p&gt;</description>
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